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integrated circuit systems, inc. general description features av9170 0237i?12/02/08 av9170-05 is only available through america ii distributor block diagram clock synchronizer and multiplier on-chip phase-locked loop for clocks synchronization synchronizes frequencies up to 107 mhz (output) @ 5.0v 1ns skew (max) between input & output clocks @ 5.0v can recover poor duty cycle clocks clk1 to clk2 skew controlled to within 1ns @ 5.0v 3.0 - 5.5v supply range low power cmos technology small 8-pin dip or soic package on chip loop filter av9170-01 , -04 for output clocks 20-107 mhz @ 5.0v, 20 - 66.7 mhz @ 3.3v av9170-02 , -05 for output clocks 5-26.75 mhz @ 5.0v, 5 - 16.7 mhz @ 3.3v the av9170 generates an output clock which is synchronized to a given continuous input clock with zero delay (1ns at 5v v dd ). using ics?s proprietary phase- locked loop (pll) ana-log cmos technology, the av9170 is useful for regenerating clocks in high speed systems where skew is a major concern. by the use of the two select pins, multiples or divisions of the input clock can be generated with zero delay (see tables 2 and 3). the standard versions produce two outputs, where clk2 is always a divide by two version of clk1. the av9170 is also useful to recover poor duty cycle clocks. a 50 mhz signal with a 20/80% duty cycle, for example, can be regenerated to the 48/52% typical of the part. the av9170 allows the user to control the pll feedback, making it possible, with an additional 74f240 octal buffer (or other such device that offers controlled skew outputs), to synchronize up to 8 output clocks with zero delay compared to the input (see figure 1). application notes for the av9170 are available. please consult ics.
2 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor pin descriptions pin configuration 8-pin dip or soic n i p r e b m u n e m a n n i pe p y tn o i t p i r c s e d 1n i b ft u p n it u p n i k c a b d e e f 2n it u p n ik c o l c e c n e r e f e r r o f t u p n i 3d n g?d n u o r g 40 s ft u p n i0 t c e l e s y c n e u q e r f 51 s ft u p n i1 t c e l e s y c n e u q e r f 61 k l ct u p t u o) s e u l a v r o f 5 , 4 , 3 , 2 , 1 s e l b a t e e s ( 1 t u p t u o k c o l c 7 d d v ?y l p p u s r e w o p 8k l c t u p t u o ) s e u l a v r o f 5 , 4 , 3 , 2 , 1 s e l b a t e e s ( 2 t u p t u o k c o l c
3 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor the av9170 has the following characteristics: 1. rising edges at in and fbin are lined up. falling edges are not synchronized. 2. the relationship between the frequencies at fbin and in with clk1 feedback is shown in table 1 below. 3. the frequency of clk2 is half the clk1 frequency. 4. the clk1 frequency ranges are: the av9170 will only operate correctly within these frequency ranges. using the av9170 eliminate high speed clock routing problems the av9170 makes it possible to route lower speed clocks over long distances on the pc board and to place an av9170 next to the device requiring a higher speed clock. the multiplied output can then be used to produce a phase locked, higher speed output clock. compensate for propagation delays including an av9170 in a timing loop allows the use of pals, gate arrays, etc., with loose timing specifications. the av9170 compensates for the delay through the pal and synchronizes the output to the input reference clock. operating frequency range the av9170 is offered in versions optimized for operation in two frequency ranges. the -01 and -04 cover high frequencies, 20 to 100 mhz.* the -02 and -05 operate from 5 to 25 mhz.* the av9170 can be supplied with custom multiplication factors and operating ranges. consult ics for details. 3.3v vdd operation the av9170 does operate at both 5.0v and 3.3v system conditions. please note the electrical characteristic specifica-tions at 3.3v include a limited output frequency (66.6 mhz max.) and a wider skew of fbin to clk1. for 3.3v5% (3.15v min.), this skew is -5.0 to 0 ns. at 3.3v10% (3.0v min.), the skew is widened to -8 ns to 0 ns and should be accounted for in system design. *at 3.3v, the maximum clk1 frequency is 66.7 mhz for - 01, -04 and 16.7 mhz for -02, -05. figure 1: application of av9170 for multiple outputs v dd =5v v dd =3.3v av9170-01, -04 20 < f clk1 < 107 mhz* < 66.7 av9170-02, -05 5 < f clk1 < 26.75 mhz* < 16.7 1 s f0 s ffn i b f) 2 0 - , 1 0 - (fn i b f) 5 0 - , 4 0 - ( 0 0 1 1 0 1 0 1 2fn i 4fn i fn i 8fn i 3fn i 5fn i 6fn i 0 1fn i functionality (table 1:)
4 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor 1 s f0 s f1 k l c2 k l c 0 0 1 1 0 1 0 1 4 x n i 8 x n i 2 x n i 6 1 x n i 2 x n i 4 x n i n i 8 x n i 1 s f0 s f1 k l c2 k l c 0 0 1 1 0 1 0 1 2 x n i 4 x n i n i 8 x n i n i 2 x n i 2 n i 4 x n i figure 4: input and output clock waveforms with clk2 connected to fbin using clk2 feedback connecting clk2 to fbin as shown in figure 2 will cause all of the rising edges to be aligned (figure 4). figure 5: input and output clock waveforms with clk1 connected to fbin table 2: functionality table for av9170-01, - 02 with clk2 feedback table 3: functionality table for av9170-01, - 02 with clk1 feedback using clk1 feedback with clk1 connected to fbin as shown in figure 3, the input and clk1 output will be aligned on the rising edge, but clk2 can be either rising or falling (figure 5). consult ics if the clk1 frequency is desired to be higher than 107 mhz. for clk2 frequencies 10 - 53.5 mhz* (-01) for clk2 frequencies 2.5 - 13.37 mhz (-02) *maximum 33.3 mhz @ 3.3v (-01), 8.33 mhz @ 3.3v (-02) figure 2: for clk1 frequencies 20 - 107 mhz? (-01) for clk1 frequencies 5 - 26.75 mhz (-02) ?maximum 66.7 mhz @ 3.3v (-01), 16.7 mhz @ 3.3v (-02) figure 3:
5 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor 1 s f0 s f1 k l c2 k l c 0 0 1 1 0 1 0 1 6 x n i 0 1 x n i 2 1 x n i 0 2 x n i 3 x n i 5 x n i 6 x n i 0 1 x n i 1 s f0 s f1 k l c2 k l c 0 0 1 1 0 1 0 1 3 x n i 5 x n i 6 x n i 0 1 x n i 5 . 1 x n i 5 . 2 x n i 3 x n i 5 x n i figure 8: input and output clock waveforms with clk2 connected to fbin figure 9: input and output clock waveforms with clk1 connected to fbin table 4: functionality table for av9170-04, - 05 with clk2 feedback table 5: functionality table for av9170-04, - 05 with clk1 feedback using clk2 feedback connecting clk2 to fbin as shown in figure 6 will cause all of the rising edges to be aligned (figure 8). using clk1 feedback with clk1 connected to fbin as shown in figure 7, the input and clk1 output will be aligned on the rising edge, but clk2 can be either rising or falling (figure 9). for clk2 frequencies 10 - 53 mhz* (-04) for clk2 frequencies 2.5 - 13.37 mhz (-05) *maximum 33.3 mhz @ 3.3v (-04), 8.33 mhz @ 3.3v (-05) figure 6: for clk1 frequencies 20 - 107 mhz? (-04) for clk1 frequencies 5 - 26.75 mhz (-05) ?maximum 66.7 mhz @ 3.3v (-04), 16.7 mhz @ 3.3v (-05) figure 7:
6 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor absolute maximum ratings v dd (referenced to gnd) . . . . . . . . . . . . 7.0 v operating temperature under bias . . . . . 0c to + 70c storage temperature . . . . . . . . . . . . . . . . ? 65c to + 15 0 c voltage on i/o pins referenced to gnd . gnd ? 0.5 v to v dd + 0.5 v power dissipation . . . . . . . . . . . . . . . . . . 0.5 watts stresses above those listed under absolute maximum ratings above may cause permanent damage to the device. this is a stress rating only and functional operation of the device at these or any other conditions above those listed in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect product reliability. *parameter guaranteed by design and characterization. not 100% tested in production. notes: 1. it may be possible to operate the av9170 outside of these ranges. consult ics for your specific application. 2. all ac specifications are measured with a 50 ? transmission line, load terminated with 50 ? to 1.4v. 3. duty cycle measured at 1.4v. 4. skew measured at 1.4v on rising edges. positive sign indicates the first signal precedes the second signal. v dd = + 5v 5%, t a = 0c to 70c, unless otherwise stated electrical characteristics at 5v s c i t s i r e t c a r a h c / c d r e t e m a r a pl o b m y ss n o i t i d n o c t s e tn i mp y tx a ms t i n u e g a t l o v w o l t u p n ivl ivd dv 5 =??8 . 0v e g a t l o v h g i h t u p n ivh ivd dv 5 =0 . 2??v t n e r r u c w o l t u p n iil ivn iv 0 =5 . 1 ?5 ??a t n e r r u c h g i h t u p n iih ivn iv =d d??5a e g a t l o v w o l t u p t u o*vl oil oa m 8 =??4 . 0v e g a t l o v h g i h t u p t u o*v1 h o ih o, a m 1 - = vd dv 0 . 5 = vd dv 4 . -?? v e g a t l o v h g i h t u p t u o*v2 h o ih o, a m 4 - = vd dv 0 . 5 = vd dv 8 . -?? v e g a t l o v h g i h t u p t u o*v3 h o ih o, a m 8 - = 4 . 2??v t n e r r u c y l p p u si1 d d z h m 0 0 1 , d e d a o l n u ) 4 0 - , 1 0 - ( ?0 30 5a m t n e r r u c y l p p u si2 d d z h m 5 2 , d e d a o l n u ) 5 0 - , 2 0 - ( ?3 10 2a m
7 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor v dd = + 5v 5%, t a = 0c to 70c, unless otherwise stated electrical characteristics at 5v *parameter guaranteed by design and characterization. not 100% tested in production. notes: 1. it may be possible to operate the av9170 outside of these ranges. consult ics for your specific application. 2. all ac specifications are measured with a 50 ? transmission line, load terminated with 50 ? to 1.4v. 3. duty cycle measured at 1.4v. 4. skew measured at 1.4v on rising edges. positive sign indicates the first signal precedes the second signal. s c i t s i r e t c a r a h c c / a r e t e m a r a pl o b m y ss n o i t i d n o c t s e tn i mp y tx a ms t i n u e m i t e s i r k c o l c t u p n i* r k l c i??0 1s n e m i t l l a f k c o l c t u p n i* f k l c i??0 1s n v 0 . 2 o t 8 . 0 , e m i t e s i r t u p t u otr* 1. d a o l f p 5 1?6 . 02s n % 0 8 o t % 0 2 , e m i t e s i rvd dtr* 2. d a o l f p 5 1?2 . 13s n v 8 . 0 o t 0 . 2 , e m i t l l a f t u p t u otf* 1. d a o l f p 5 1?4 . 02s n % 0 2 o t % 0 8 , e m i t l l a fvd dtf* 2. d a o l f p 5 1?9 . 02s n 1 0 - 0 7 1 9 v a , e l c y c y t u d t u p t u odt* 13 , 2 e t o n . d a o l f p 5 10 42 5 / 8 40 6% 2 0 - 0 7 1 9 v a , e l c y c y t u d t u p t u odt* 23 , 2 e t o n . d a o l f p 5 15 41 5 / 9 45 5% a m g i s 1 , r e t t i jts 1* ? 5 2 10 0 3s p e t u l o s b a , r e t t i jt1 s b a* z h m 0 1 > 1 k l c r o f ) 4 0 - , 1 0 - ( 0 0 5 ??0 0 5s p z h m 5 . 2 > 1 k l c r o f ) 5 0 - , 2 0 - ( e t u l o s b a , r e t t i jt2 s b a* z h m 0 1 < 1 k l c r o f ) 4 0 - , 1 0 - ( ?? 2 % z h m 5 . 2 < 1 k l c r o f ) 5 0 - , 2 0 - ( y c n e u q e r f t u p n i fi1 4 0 - , 1 0 - 0 7 1 9 v a , 1 e t o n8?7 0 1z h m y c n e u q e r f t u p n i fi2 5 0 - , 2 0 - 0 7 1 9 v a2?5 7 . 6 2z h m 1 k l c y c n e u q e r f t u p t u o fo1 4 0 - , 1 0 - 0 7 1 9 v a0 2? 7 0 1z h m 1 k l c y c n e u q e r f t u p t u o fo2 5 0 - , 2 0 - 0 7 1 9 v a5?5 7 . 6 2z h m w e k s n i o t n i b ft1 w e k s* d a o l f p 5 1 ; 4 , 2 e t o n s n 5 < e m i t e s i r t u p n i 1 ?3 . 0 ?1s n w e k s n i o t n i b ft2 w e k s* d a o l f p 5 1 ; 4 , 2 e t o n s n 0 1 < e m i t e s i r t u p n i 2 ?3 . 0 ?2s n w e k s 2 k l c o t 1 k l ct3 w e k s* 4 , 2 e t o n1 ?4 . 01s n
8 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor *parameter guaranteed by design and characterization. not 100% tested in production. notes: 1. it may be possible to operate the av9170 outside of these ranges. consult ics for your specific application. 2. all ac specifications are measured with a 50 ? transmission line, load terminated with 50 ? to 1.4v. 3. duty cycle measured at 1.4v. 4. skew measured at 1.4v on rising edges. positive sign indicates the first signal precedes the second signal. v dd = + 3.3v 5%, t a = 0c to 70c, unless otherwise stated electrical characteristics at 3.3v s c i t s i r e t c a r a h c / c d r e t e m a r a pl o b m y ss n o i t i d n o c t s e tn i mp y tx a ms t i n u e g a t l o v w o l t u p n ivl ivd dv 3 . 3 =??2 . 0vd dv e g a t l o v h g i h t u p n ivh ivd dv 3 . 3 =7 . 0vd d? ? v t n e r r u c w o l t u p n iil ivn iv 0 =7 ?4 ??a t n e r r u c h g i h t u p n iih ivn iv =d d??5a e g a t l o v w o l t u p t u o*vl oil oa m 6 =??4 . 0v e g a t l o v h g i h t u p t u o*v1 h o ih o, a m 1 - = vd dv 3 . 3 = vd dv 4 . -?? v e g a t l o v h g i h t u p t u o*v2 h o ih o, a m 3 - = vd dv 3 . 3 = vd dv 8 . -?? v e g a t l o v h g i h t u p t u o*v3 h o ih o, a m 6 - = 4 . 2??v t n e r r u c y l p p u si1 d d z h m 7 . 6 6 , d e d a o l n u ) 4 0 - , 1 0 - ( ?7 10 3a m t n e r r u c y l p p u si2 d d z h m 7 . 6 1 , d e d a o l n u ) 5 0 - , 2 0 - ( ?7 5 1a m
9 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor *parameter guaranteed by design and characterization. not 100% tested in production. notes: 1. it may be possible to operate the av9170 outside of these ranges. consult ics for your specific application. 2. all ac specifications are measured with a 50 ? transmission line, load terminated with 50 ? to 1.4v. 3. duty cycle measured at 1.4v. 4. skew measured at 1.4v on rising edges. positive sign indicates the first signal precedes the second signal. v dd = + 3.3v 5%, t a = 0c to 70c, unless otherwise stated electrical characteristics at 3.3v s c i t s i r e t c a r a h c c / a r e t e m a r a pl o b m y ss n o i t i d n o c t s e tn i mp y tx a ms t i n u e m i t e s i r k c o l c t u p n i* r k l c i??0 1s n e m i t l l a f k c o l c t u p n i* f k l c i??0 1s n v 0 . 2 o t 8 . 0 , e m i t e s i r t u p t u otr* 1. d a o l f p 5 1?1 . 12s n % 0 8 o t % 0 2 , e m i t e s i rvd dtr* 2. d a o l f p 5 1?8 . 14s n v 8 . 0 o t 0 . 2 , e m i t l l a f t u p t u otf* 1. d a o l f p 5 1?8 . 02s n % 0 2 o t % 0 8 , e m i t l l a fvd dtf* 2. d a o l f p 5 1?2 . 13s n 4 0 - , 1 0 - 0 7 1 9 v a , e l c y c y t u d t u p t u odt* 13 , 2 e t o n . d a o l f p 5 10 42 50 6% 5 0 - , 2 0 - 0 7 1 9 v a , e l c y c y t u d t u p t u odt* 23 , 2 e t o n . d a o l f p 5 15 41 55 5% a m g i s 1 , r e t t i jts 1* ? 0 5 10 0 3s p e t u l o s b a , r e t t i jt1 s b a* z h m 0 1 > 1 k l c r o f ) 4 0 - , 1 0 - ( 0 0 5 ??0 0 5s p z h m 5 . 2 > 1 k l c r o f ) 5 0 - , 2 0 - ( e t u l o s b a , r e t t i jt2 s b a* z h m 0 1 < 1 k l c r o f ) 4 0 - , 1 0 - ( 2 ??2% z h m 5 . 2 < 1 k l c r o f ) 5 0 - , 2 0 - ( y c n e u q e r f t u p n i fi1 4 0 - , 1 0 - 0 7 1 9 v a7?7 . 6 6z h m y c n e u q e r f t u p n i fi2 5 0 - , 2 0 - 0 7 1 9 v a2?7 . 6 1z h m 1 k l c y c n e u q e r f t u p t u o fo1 4 0 - , 1 0 - 0 7 1 9 v a0 2? 7 . 6 6z h m 1 k l c y c n e u q e r f t u p t u o fo2 5 0 - , 2 0 - 0 7 1 9 v a5?7 . 6 1z h m w e k s n i o t n i b ft1 w e k s* d a o l f p 5 1 ; 4 , 2 e t o n 0 . 3vd d 7 . 3 0 . 8 ?0 . 2 ?0s n w e k s n i o t n i b ft2 w e k s* d a o l f p 5 1 ; 4 , 2 e t o n 0 . 3vd d 7 . 3 0 . 5 ?0 . 2 ?0s n w e k s 2 k l c o t 1 k l ct3 w e k s* d a o l f p 5 1 ; 4 , 2 e t o n0 . 2 ?9 . 0 ?0s n
10 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor general layout precautions: 1) use a ground plane on the top layer of the pcb in all areas not used by traces. 2) make all power traces and vias as wide as possible to lower inductance. notes: 1) all clock outputs should have series terminating resistor. not shown in all places to improve readibility of diagram. connections to vdd:
11 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor ordering information 9170-xxcn08lf (8 lead plastic dip [300 mils] ) 9170-XXCS08LF (8 lead soic [150 mils] ) 8-pin dip package 8-pin soic package for the soic package, the av9170-01 is marked av70-1 and the av9170-02 is marked av70-2. xxxx - ppp m x#w lf lead free, rohs compliant (optional) lead count & package width lead count = 1, 2 or 3 digits w = 0.3" soic or 0.6" dip; none = standard width package type n = dip (plastic) s = soic pattern number (2 or 3 digit number for parts with rom code patterns) device type (consists of 3 to 7 digit numbers) example:
12 av 9170 0237i?12/02/08 av9170-05 is only available through america ii distributor revision history rev. issue date description page # h 11/29/2008 added lf to ordering information 11 i 12/2/2008 removed ics prefix from ordering information 11

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